The present invention relates: to a semiconductor device and a production method thereof; and in particular to a technology effectively applied to a semiconductor device having a nonvolatile memory cell a memory gate electrode of which is formed over the sidewall of a control gate electrode and a production method thereof.
A semiconductor device formed by jointly loading an electrically rewritable nonvolatile memory and a microcomputer over a single silicon substrate is widely used as an embedded microcomputer for an industrial machine, a household appliance, an in-vehicle device, or the like.
A nonvolatile memory in such a semiconductor device is used by storing and occasionally retrieving a program required by a microcomputer. As a nonvolatile memory cell having a structure suitable for such joint loading, there is a split gate type memory cell formed by coupling a control MIS (Metal Insulator Semiconductor) transistor to a memory MIS transistor in series.
Among the split gate type memory cells, in particular a memory cell of a structure formed by disposing the gate electrode of a memory MIS transistor (a memory gate electrode) over the sidewall of the gate electrode of a control MIS transistor (a control gate electrode) by using a self-aligning technology: can reduce the gate length of the memory gate electrode to a length not longer than the minimum resolution limit of lithography; and hence can realize a memory cell finer than a memory cell having a structure formed by individually forming a control gate electrode and a memory gate electrode by etching with a photoresist film as a mask.
In two kinds of MIS transistors configuring a split gate type memory cell, the memory MIS transistor stores information by making a charge retention film retain electric charge and there are mostly two kinds as the charge retention methods. One is a floating gate method of using a conductive polycrystalline silicon film as the charge retention film and the other is a MONOS (Metal Oxide Nitride Oxide Semiconductor) method of using an insulation film having a nature of accumulating electric charge such as a silicon nitride film as the charge retention film and storing the electric charge in the charge retention film.
Japanese Unexamined Patent Publication No. 2006-100531 discloses a technology of realizing the higher integration and improving the rewrite cycle of a semiconductor device having nonvolatile memory elements by: jointly loading a first MONOS nonvolatile memory element and a second MONOS nonvolatile memory element having a gate width wider than the first MONOS nonvolatile memory element over an identical substrate; and using the first MONOS nonvolatile memory element for storing program data of a low rewrite cycle and the second MONOS nonvolatile memory element for storing processing data of a high rewrite cycle.
An electrically rewritable nonvolatile memory such as an EEPROM (Electrically Erasable Programmable Read Only Memory) or a flash memory can rewrite a program in an on-board state, hence allows the development period to be shortened and the development efficiency to be improved, and thus is used in various applications including the application to the production of small batches of a variety of products, tuning for individual applications, and updating a program after delivery. In recent years, demands for a microcomputer jointly loaded with a flash memory are strong and the diversification of a specification required of a jointly loaded flash memory advances. In an in-vehicle application in particular, there are various requests for high reliability, high speed movement, the expansion of movement assurance temperature range, and the increase of a rewrite cycle.
In order to meet all the requests with a single kind of a memory cell however, it is necessary for example to develop a memory having a high operation speed, a high rewrite cycle, high reliability, and very high performance, but on this occasion the development period prolongs and the production cost increases undesirably. Consequently, a microcomputer loaded with memories that are selectively formed efficiently and have a plurality of capabilities conforming to intended uses in an identical chip is also developed.